Responsibilities:
Implement World Class Manufacturing and Lean Manufacturing practices at all of Possehl Electronics’ manufacturing sites.
Champion and drive Yield Improvements at all sites with Pareto Analysis and Fishbone Cause-and-Effect Analysis (Man-Method-Machine-Materials, Who-What-When-How).
Champion and drive Cycle Time Reductions with Assembly Line Balancing, Queue Time Analysis and Setup Time Analysis.
Champion and drive Productivity Increase with Work Method Analysis (Activity Charts, Time Studies).
Synergize engineering strengths between all sites so as to achieve overall engineering excellence for Possehl Electronics globally.
Champion and create knowledge database from all sites to ensure continuity of engineering excellence.
On a secondary role, responsible to provide technical support to Manufacturing Centers on customer quality issues.
Plan and organize New Products and their Introduction to Production.
Spearhead the company into leading edge Plating, Stamping and Etching technologies of Semiconductor Interconnects.

Requirements:
At least 10 years of manufacturing engineering experience in a Semiconductor/Electronics Interconnects-Manufacturing environment.
Experienced in Etch/Plate and Precision Stamp Technologies is required.
Related experience in process yield improvement and manufacturing optimisation is required.
Strong understanding of engineering principles. Excellent technical skills and analytical skills. Proven ability to achieve objectives and targets.

It is unlawful to employ a person who does not have permission to live and work in Malaysia. Unless the advert states otherwise, please ensure you have this permission before applying.