CKT/DE Analog EngineerOpen Nationals

Petaling, Selangor 14 April (updated)

Chis International Technical Resource Sdn Bhd

  • Description

    CKT/DE (Analog) Engineer
    Kuala Lumpur Malaysia
    Permanent and Contract
    Open for Malaysians and Foreigners
    Salary is negotiable

    Job Description:
    MIG MYS is seeking experienced Mixed-signal design engineers to join our talented and vibrant team. You will be directly involved in delivering next-generation LPDDR5/DDR5 PHY or Die2Die Interconnects PHY designs for SOC application on Intel leading process node.

    Key Responsibilities include but not limited to:
    • Design and development of mixed-signal circuits such as High Speed Transmitters and Receivers, equalizers, DLL, clocking distribution, on die voltage regulators, Circuit Compensation Blocks and Voltage references blocks.
    • Own design verification plans covering functional, performance and reliability meeting high volume productization requirement.
    • Participate in circuit design review and work with Mask Designers on layout implementation and reviews
    • Collaborate with design engineers of other disciple on integration of the analog circuit to the DDR PHY
    • Mentoring of junior engineer

    Preferred Qualification:
    • Proven track record on design of high speed analog and mixed-signal design, architecture, system and integration aspects for DDR PHYs
    • Good Understanding of to LPDDR/DDR JEDEC specifications and related DDR Protocols
    • Good understanding of design for yield and exposure to production challenges in latest technology process node
    • Experience with industry standard tools for Analog design such as Cadence ADE, Spectre, AMS verification, FEV, StarRC etc..
    • Cross-discipline knowledge in any of these areas, such as Analog integration, RTL/System Verilog, Static timing analysis concepts, APR, Floor-planning, Metal-routing, Power-grid, Memory IO training MRC and HAS/MAS specification documentation.
    • Strong written and oral communication skills
    • BSEE with 10+ years relevant experience or Master's with 7+ years relevant experience required. Education Fo3005cus should include integrated circuit design and analog design.
  • Number of vacancies: 5
  • Requirements

  • Minumun level of education: Master´s Degree
  • Years of experience: 10
  • Language(s): English
  • Availability for travel: Yes
  • Availability for change of residence: Yes

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